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Members

junbum_park.jpeg
Junbum Park

Researcher

Biography

I started as an associate engineer in the Device Solutions division at Samsung Electronics in 2008, where I worked on SOC development for various technologies including HDD, SSD, NVMe, NVMeOF, and CXL. Through the SSIT course, I joined COMPASS Lab to deepen my understanding of computer architecture. I am currently conducting research in the field of CXL.

Research Interests
  • Computer Architecture
  • Memory Systems
  • CXL
  • SSIT Course

Email: jbrara.park@skku.edu    Tel: +82-31-299-4915

Related Publications
    DDLM: Demand-Aware Dynamic Link Width Management for Energy-Efficient CXL Memory

    The 43rd IEEE International Conference on Computer Design (ICCD 2025), 2 Aug 2025

    Evaluating Data Compression Algorithms and Their Impact on NAND Flash-Based SSDs

    2025 International Conference on Electronics, Information, and Communication (ICEIC), 1 Apr 2025

    Buddy ECC: Making Cache Mostly Clean in CXL-Based Memory Systems for Enhanced Error Correction at Low Cost

    2025 Design, Automation & Test in Europe Conference & Exhibition (DATE 2025), 31 Mar 2025

    SPB: Towards Low-Latency CXL Memory via Speculative Protocol Bypassing

    2025 Design, Automation & Test in Europe Conference & Exhibition (DATE 2025), 31 Mar 2025

    Performance Characterization of CXL Memory Expander: Impact on Read and Write Latencies

    24' International Conference on Consumer Electronics (ICCE-ASIA 2024), 2 Nov 2024

COMPASSLAB

The COMPASS LAB is a computer architecture research group in the Department of Electrical and Computer Engineering at SKKU.

Location
  • 2066, Seobu-ro, Jangan-gu, Suwon-si, Gyeonggi-do, Republic of Korea Sungkyunkwan University Semiconductor Building Room #400526

Contact us

seokin@skku.edu

+82-31-299-4915

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